Flag 32 error in conmutation HV

32 50 2 kVp COMMUTATION FAIL HARDWARE ERROR
Unable to clear kV commutation fail latch. Checked at the start of exposure
sequence. Most probable cause is the opening of SCR Fuse F9 (on units that
have them). See “KV Commutation Failure Detection” on page 81.
KV Commutation Failure Detection
Circuit
Description
Circuit Function: This Circuit monitors the Inverter Power supply voltage.
If it drops to (near) zero Volts it performs the following functions:
• disables the KV Alternating Pulse Circuit (see page 56)
• disables the KV Gate Drive Circuits (see page 57)
• signals the RPU mprocessor (which terminates the exposure and sends a
flag to the OC to display the error)
Circuit Flow: Two thin wires, red (+525VDC) and white (RETURN), connect
from (across) the Inverter Power Supply to TB5-1 and TB5-2 of the Gate Drive
PCB. The voltage of the Inverter Power Supply is divided by R30, R31, L6 and
the LED portion of IC7. If the inverter cross fires (page 58) the voltage drops to
zero volts. As it approaches zero volts L6 and the LED portion of opto-coupler
IC7 no longer illuminate. This causes the output of IC7 (pin 7) to go low. This
turns off the LED portion of opto-couplerIC9 and causes its output to go low.
This low signal goes two places:
1. Off the board as -KV COMM FAIL at J1-13. This signal moves up the Gate
Drive Ribbon Cable and across the Backplane PCB into the KV Control
PCB P6-21 where it is called KVCF. It next passes through two inverters to
Flip-Flop IC12B J-K driving its “Preset” input low causing its Q output to go
high and its Q output to go low. These outputs effectively split the signal
and function as follows:
• The Q output is inverted by IC10F and then passed through EKV9 to
hold low the J-K inputs of IC12A. This disables the Alternating Pulse
Circuit (see page 56).
• The Q output becomes COM_FAIL and is sent to IC5 through EKV0.
IC5 signals the mprocessor to terminate the exposure and send a
flag to the OC.
2. To one input of IC13B causing a low at its output. This triggers the input of
one-shot IC11B and produces a 0.1 second, positive going pulse at its output
(pin-5). This pulse is passed to IC13A and IC13C and prevents them
from passing the low going inverter drive pulses, preventing continued
operation of the inverter.